A Memristor-based Neural Network Circuit with Synchronous Weight Adjustment
Published in Neurocomputing, 2018
Recommended citation: Le Yang, Zhigang Zeng, and Xinming Shi, “A memristor-based neural network circuit with synchronous weight adjustment,” Neurocomputing, vol. 363, pp. 114–124, 201.
Memristor-based neural network circuits show promise for hardware implementations in artificial neural networks. However, their training speed is hindered by asynchronous synaptic weight adjustments, and the relationship between weight variation and control signal duration remains unclear. In this work, we introduce a neuron circuit with memristor-CMOS hybrid synaptic circuits. Memristance can be adjusted using positive voltage. We establish an inference mechanism to relate synaptic weight changes to control signal duration. Based on this circuit, we propose a single-layer neural network (SNN) for character recognition and a multi-layer neural network (MNN) for pattern classification. With microcontroller control, both networks achieve synchronous weight adjustment, allowing simultaneous memristance changes in all required synaptic circuits in one iteration.